Design Verification Intern
Core
Verify complex semiconductor solutions for next-generation cloud data center switching silicon using industry-standard verification tools and methodologies.
Role type
Design Verification Intern
Builds
Functional verification collateral, simulation test environments, and testbenches for cloud switching chips.
Domain
Semiconductor / Digital Logic Design / Cloud Infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Verilog/SystemVerilog, UVM, C, digital logic design, finite state machines, computer architecture fundamentals, Linux environment proficiency
Preferred skills
Python scripting, Perl, Tcl, problem-solving skills
Technologies
Verilog, SystemVerilog, UVM, C, Python, Perl, Tcl, Linux
Responsibilities
Design and maintain UVM testbench components, develop simulation test environments and checkers, analyze design specifications to build test plans, debug failing simulations, automate data collection and analysis
Seniority
Intern
