Senior Verification Engineer
Core
Pre-silicon RTL verification for high-performance ML/AI ICs targeting data center scale-out applications.
Role type
Senior IC silicon verification engineer
Builds
Pre-silicon RTL verification environments and testbenches for AI chips
Domain
Semiconductor hardware / AI infrastructure
Deliverable
production ML models | product features
Required skills
Python, C++, SystemVerilog, digital hardware concepts, RTL debugging, waveform debugging, UVM, testbench creation, stimulus creation, functional modeling, coverage closure, transaction-level modeling, SVA, Bazel, monorepo workflows
Preferred skills
Formal verification, commercial EDA tools, open source silicon tools, architecture discussions
Technologies
Python, C++, SystemVerilog, UVM, Cocotb, Verilator, Icarus Verilog, Bazel, SVA
Responsibilities
Build testbenches and create stimulus for verification; define and close coverage; contribute to specification and architecture discussions; debug RTL and waveforms; improve verification workflows and tape-out quality
Seniority
Senior, hands-on IC
