Package Design Staff/Sr.Staff Engineer
Core
Develop advanced microelectronic packages (C4, BGA) for high-speed interfaces, driving development from concept through tapeout to ensure performance, reliability, and manufacturability.
Role type
Staff IC package design engineer
Builds
Advanced IC packages supporting high-speed data infrastructure (enterprise, cloud, AI, carrier)
Domain
Semiconductor / Advanced Packaging / High-Speed Electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Package design (C4, BGA, ball maps), SI/PI fundamentals, netlist mapping, die placement, padstack definition, design rule compliance, foundry/substrate constraints, cross-functional co-design
Preferred skills
Signal/power simulation, emerging architectures (CoWoS, EMIB, CPO, CPC), thermal/mechanical constraints, automation scripting
Technologies
Cadence OrbitIO, Cadence Integrity System Planner (ISP)
Responsibilities
Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency; plan and validate netlist mappings across dies, interposers, and substrates; define die placement, padstacks, net assignments, and package-level connectivity; create and maintain Package Requirement Documents (PRDs)
Seniority
Staff, hands-on IC
