Sr. IC Package Design Engineer (Silicon Engineering)
Core
Developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures, specifically leading packaging for custom in-house ASICs and RFICs for digital beam formers and modems.
Role type
Senior IC Package Design Engineer (Silicon Engineering)
Builds
Custom in-house ASICs and RFICs for digital beam formers and modems
Domain
Aerospace / Satellite Communications / Silicon Engineering
Deliverable
production ML models | product features | infrastructure
Required skills
IC package design, BGA configuration, package structure design, package/SIP layout, design verification, tapeout, cross-functional coordination, silicon floor plan optimization, bump and package pin out design, signal/power integrity simulation, RF performance optimization, design methodology innovation
Preferred skills
Co-packaged Optics (CPO) experience, substrate design for RF/digital/high-speed/mixed-signal die, Cadence APD+/SIP tool proficiency, SI/PI analysis, EM simulation (SIWave, HFSS, ADS), BGA package substrate technologies
Technologies
Cadence APD+/SIP, SIWave, HFSS, ADS
Responsibilities
Own and drive advanced package selection and new product BGA configuration; Responsible for package/SIP layout, optimization, design verification and tapeout; Interface and coordinate with cross-functional groups on package selection and feasibility; Simulate and optimize signal/power integrity and RF performance; Drive methodology and productivity improvements in package design
Seniority
Senior, hands-on IC
