Layout Engineer, Power Modules
Core
Design silicon interposer and power-module layouts, defining AI agent capabilities for automated layout authoring.
Role type
Senior IC layout engineer (power modules & silicon interposers)
Builds
Power modules, silicon interposers, and heterogeneous integration designs
Domain
Semiconductor manufacturing, power electronics, AI-assisted engineering
Deliverable
production ML models
Required skills
Cadence Virtuoso Layout XL, Siemens Calibre (DRC/LVS/PEX), Python or SKILL scripting, power-module design flow knowledge, GDS/OASIS inspection, Linux environment proficiency
Preferred skills
SiC/wide-bandgap module experience, Ansys Q3D/R3D, Virtuoso SKILL APIs, reticle/database release, AI agent tool use
Technologies
Cadence Virtuoso, Siemens Calibre, KLayout, Cliosoft SOS, Ansys Q3D/R3D, Python, SKILL
Responsibilities
Design and edit power-module and silicon-interposer layouts; run DRC, LVS, and parasitic extraction; prepare layouts for stream-out and tapeout; validate AI-generated layouts against design intent and rules; automate layout tasks via scripting; contribute layout requirements to platform feature discussions.
Seniority
Senior, hands-on IC
