Staff Analog layout Engineer
Core
Design high-quality layouts for complex Analog/Mixed-Signal (AMS) IP blocks including voltage regulators, bandgap references, current sense amplifiers, and high-voltage switches for power management products.
Role type
Staff Analog Layout Engineer
Builds
Power management ICs (PMICs), multiphase controllers, SiC drivers, and e-fuses for consumer, industrial, and automotive applications.
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (Analog IC layouts)
Required skills
Analog/mixed-signal layout design, deep submicron CMOS and BCD technologies, area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS, ESD), power analysis (EM/IR-Drop), semiconductor manufacturing process knowledge, DFM techniques, debugging LVS/DRC errors, Unix OS proficiency, Cadence Design Environment (CDE) expertise
Preferred skills
Scripting for layout design automation (SKILL, Perl, Python), microcontroller chip taping out support, cross-functional collaboration with Chip/Tech/CAD teams
Technologies
Cadence, Mentor Graphics, SKILL, Perl, Python, Unix OS, Calibre DRC/ERC/LVS tools