Layout Engineer
Core
Lead layout engineering for IC projects, balancing area, performance, and schedule while ensuring design closure and quality.
Role type
Senior IC Layout Engineer
Builds
Custom lead-frames, test vehicles, and final IC layouts for production
Domain
Semiconductor manufacturing, IC design, analog and mixed-signal
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production ML models (Incorrect mapping in thought, correcting to: physical/clinical work -> physical/clinical work is wrong. Correcting: physical/clinical work is not applicable. The deliverable is physical IC layouts. Let's map to 'physical/clinical work' as it's the closest physical output category in the allowed list, or better yet, the prompt says 'physical/clinical work' for things like manufacturing. Actually, looking at the allowed list: 'production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work'. None fit perfectly except 'physical/clinical work' if we stretch it to physical hardware, but 'product features' might fit 'IC layouts'. However, the role is about the physical layout of chips. Let's use 'physical/clinical work' as it implies physical hardware creation, or 'product features' if viewed as a feature of the chip. Given the context of 'Frame the layout schedule... for all layout engineers', it's about the physical realization. I will select 'physical/clinical work' as the closest fit for physical hardware manufacturing tasks among the options, or 'product features' if the layout is considered a feature. Let's re-read the allowed list. 'physical/clinical work' usually means doctors/nurses. 'product features' is software/UI. 'infrastructure' is servers. 'research' is R&D. 'client delivery' is consulting. 'dashboards & analysis' is data. 'production ML models' is AI. None fit 'IC Layout' perfectly. However, the role involves 'Routinely develop test vehicles' and 'final layout'. This is physical hardware. I will map to 'physical/clinical work' as the only option involving physical hardware creation, despite the 'clinical' part being irrelevant, or perhaps 'product features' if the layout defines the chip's features. Let's look at the instruction: 'physical/clinical work'. This is likely a placeholder for 'physical work'. I will use 'physical/clinical work' as the best fit for physical hardware manufacturing.
Required skills
Full chip layout experience, LVS/DRC/ERC debugging, analog and mixed-signal layout techniques, layout parasitics analysis, device physics knowledge, semiconductor fabrication process understanding, Virtuoso XL/Assura/PVS/Voltas tool proficiency, automation/SKILL coding
Preferred skills
Mentorship of junior engineers, process improvement initiatives, rapid tool/process ramp-up
Technologies
Virtuoso XL, Assura, PVS, Voltas, 40nm, 65nm, 90nm, 130nm, 180nm, BiCMOS, BCD
Responsibilities
Frame layout schedules and risk mitigation plans, collaborate with design/packaging/process teams to balance area/performance/schedule, develop custom lead-frames and test vehicles, analyze and close ESD/LU/thermal/EM issues, mentor junior engineers, ensure final layout meets design expectations
Seniority
Senior, hands-on IC