Senior Layout Engineer
Core
Senior Analog Layout Engineer responsible for IC layout development, schedule framing, and ensuring design closure for custom mobile electronics.
Role type
Senior IC Layout Engineer (Analog/Mixed-Signal)
Builds
Custom IC system solutions including display power, charger power, camera PMICs, and communication interface products.
Domain
Semiconductor design and manufacturing (Analog ICs, Embedded Processors)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Full chip layout experience, LVS/DRC/ERC/antenna debug, analog and mixed-signal layout techniques, layout parasitics analysis, device physics understanding, semiconductor fabrication process knowledge, Virtuoso XL/Assura/PVS/Voltas proficiency, SKILL coding for automation
Preferred skills
Experience with 40nm–180nm nodes, BiCMOS/BCD technologies, test vehicle development for new process/package
Technologies
Virtuoso XL, Assura, PVS, Voltas, SKILL
Responsibilities
Frame layout schedules and risk mitigation plans, collaborate with design/packaging/process teams to balance area/performance/schedule, analyze and close ESD/LU/thermal/EM issues, mentor junior engineers, develop test vehicles for new technologies, ensure final layout meets design expectations
Seniority
Senior, hands-on IC
