ASIC Engineering Technical Leader - Emulation
Core
Lead ASIC verification planning, strategy, and execution for complex networking SoCs, ensuring high-quality project delivery and silicon bring-up.
Role type
Senior IC ASIC Verification Technical Lead
Builds
Networking SoCs and hardware platforms for Cisco Switching, Routing, and Wireless products
Domain
Networking hardware / ASIC design
Required skills
SystemVerilog, UVM, hardware emulation, verification strategy, team leadership, root cause analysis, Python/Perl scripting
Preferred skills
Datacenter/AI/networking ASIC experience, high-speed protocols (PCIe, Ethernet, CXL, HBM, DDR), silicon bring-up, verification automation
Technologies
SystemVerilog, UVM, Python, Perl, Cadence Palladium, Siemens Veloce/StratoCS, Synopsys ZeBu
Responsibilities
Lead ASIC verification planning and execution; Drive verification strategy and coverage closure; Mentor verification engineers; Develop scalable verification environments; Collaborate with architecture, RTL, and emulation teams; Lead complex debug and root cause analysis; Champion verification productivity improvements
Seniority
Senior, hands-on IC with technical leadership
