ASIC Engineer
Core
ASIC verification engineer developing verification environments for Cisco's Silicon One programmable architecture.
Role type
ASIC Verification Engineer
Builds
Cisco Silicon One chip designs for future routing portfolio
Domain
Semiconductor / ASIC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, functional verification methodologies, RTL design, bug resolution, coverage closure, post-silicon validation, root-cause analysis
Preferred skills
MATLAB simulations, bit-exact modeling, mixed-signal systems, Clock Domain Crossing (CDC)
Technologies
UVM, RTL, MATLAB
Responsibilities
Review micro-architecture specifications, Implement Verification environment UVM based, Collaborate with Design engineers to resolve bugs and achieve coverage closure, Work with the firmware/Lab teams to verify chip flows, Perform debug, root-cause analysis, and post-silicon validation in the lab
Seniority
Mid-level, hands-on IC
