Mechanical Engineering Technical Leader
Core
Perform finite element analysis and thermomechanical simulations for ASIC packages, substrates, and advanced packaging assemblies to ensure mechanical reliability and support product design.
Role type
Senior IC mechanical engineer (semiconductor packaging)
Builds
High-performance Cisco ASIC systems and complex silicon packages
Domain
Semiconductor manufacturing and hardware engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
finite element analysis, thermomechanical simulation, 3D modeling, Python scripting, Fortran scripting, solder joint reliability analysis, material behavior modeling (plasticity, creep, viscoelasticity), failure investigation
Preferred skills
CAD design, GD&T, design-for-reliability principles, advanced packaging technologies (flip chips, 2.5D/3D), heterogeneous integration, material characterization, script-based automation
Technologies
ABAQUS, ANSYS, AUTOCAD, CREO
Responsibilities
Perform FEA to evaluate thermal mechanical stress and warpage; simulate linear/nonlinear material behaviors; develop and automate simulation workflows; correlate FEA predictions with test data and field returns; document and present analysis results and design recommendations
Seniority
Senior, hands-on IC
