Advanced Packaging Development Engineer
Core
Lead the definition, development, and qualification of next-generation 2.5D and 3D packaging technologies for future products.
Role type
Senior IC advanced packaging development engineer
Builds
2.5D/3D packaging architectures, hybrid bonding, high-density interposers, fine-pitch microbumps, and Through-Silicon Vias (TSVs)
Domain
Semiconductor manufacturing / Advanced packaging
Required skills
2.5D/3D packaging architecture, hybrid bonding, fine-pitch microbumps, TSVs, interposer design, fab BEoL/MEoL interconnect processing, wafer-level packaging, advanced assembly flows, thermo-mechanical reliability, chip-package interaction failure analysis, layout/physical design tools, engineering data analysis, foundry/OSAT vendor management
Preferred skills
PhD in relevant field, deep expertise in semiconductor integration schemes, systems mindset for balancing performance/power/reliability/cost
Technologies
Hybrid bonding, fine-pitch microbumps, interposers, TSVs, layout tools, physical design tools
Responsibilities
Lead definition and qualification of advanced packaging technologies; Design experimental test vehicles and establish packaging design rules; Assess chip-package interaction risks and correlate mechanical/thermal stress behaviors; Collaborate with silicon design, SI/PI, and thermal teams for system trade-offs; Direct foundry and OSAT partners on technology roadmaps and manufacturing ramp
Seniority
Senior, hands-on IC
