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Design Verification Engineer

Cupertino, United States of America💼 Full-time💰 $150,400–$150,400🗓 2026-09-17 → 2026-09-28

Core

Review design specifications, extract attributes, and collaborate with design teams to verify digital logic and CPU-based designs using SystemVerilog and C.

Role type

Senior IC design verification engineer (digital/CPU)

Builds

Regression scripts, test bench environments, checkers, and coverage databases for silicon verification

Domain

Semiconductor hardware design and verification

Required skills

SystemVerilog, C, Perl/Python/shell scripting, Digital Electronics, Verilog RTL, CPU architecture, simulation debugging, MATLAB modeling

Preferred skills

N/A

Technologies

VCS, Verdi, MATLAB

Responsibilities

Review design specifications and test plans; generate coverage databases and collaborate to close coverage; develop regression scripts and run regressions on infrastructure; file tickets for RTL bugs with waveform analysis; develop test bench environments and directed/random/constrained tests; create functional coverage metrics; plan and develop checkers to identify design bugs.

Seniority

Senior, hands-on IC

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