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Principal Silicon Engineer

United States, California, Mountain View💼 Full-time🗓 2026-09-29 → 2026-10-03

Core

Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture requirements into high-quality hardware implementations.

Role type

Principal Silicon Engineer (IC Design)

Builds

Complex silicon blocks and subsystems for semiconductor products

Domain

Semiconductor / Hardware Design

Required skills

Microarchitecture design, RTL design, Static timing analysis, Synthesis, Power Performance Area (PPA) trade-offs, Full RTL2GDS flow, Tcl, Python

Preferred skills

Design automation with AI, Constraint-checking, Flow improvements, Mixed-signal interface timing, DFT collaboration

Responsibilities

Lead capture and validation of design intent for digital and mixed-signal blocks, Provide static timing leadership for mixed-signal interfaces, Partner with RTL, PD, mixed-signal, DFT, and CAD teams to resolve cross-domain issues, Contribute to design automation including leveraging AI and flow improvements.

Seniority

Principal, hands-on IC design with strategic ownership

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