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Staff/Principal Logical Design Engineer

Bristol💼 Full-time🗓 2026-07-09 → 2026-07-31

Core

Designing micro-architecture specifications and RTL for AI compute chips.

Role type

Staff/Principal Silicon Logical Design Engineer

Builds

Graphcore AI chips

Domain

Semiconductor / AI Compute

Deliverable

production ML models

Required skills

SystemVerilog, VHDL, Python, Tcl, digital design flows, EDA tools, block-level design, chip-level auditing

Preferred skills

processor design, high-speed serial interfaces, IP integration, arithmetic pipeline design, floating-point design, DFT, synthesis, timing analysis

Technologies

SystemVerilog, VHDL, Python, Tcl, EDA tools

Responsibilities

Produce high quality micro-architecture specification and RTL for Graphcore chips, contribute to shared design infrastructure and flows, perform block-level and chip-level checks and auditing, work closely with Physical Design, Verification and DFT teams

Seniority

Staff/Principal, hands-on IC

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