Principal DFT Engineer
Core
Lead DFT strategy and execution across multiple projects, defining architecture (scan, MBIST, JTAG) and managing ATPG to ensure high fault coverage and test efficiency.
Role type
Principal DFT Engineer
Builds
Production test flows and post-silicon debug solutions for chip designs
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DFT architecture definition, scan insertion, Custom Memory BIST design and verification, ATPG and pattern generation, post-silicon bring-up and debug, RTL and gate-level simulation debug, ATE platform support, tool and flow development, project milestone tracking, emerging DFT methodology evaluation
Preferred skills
Experience with Siemens DFT tools
Technologies
Siemens DFT tools, ATE platforms
Responsibilities
Lead DFT strategy and execution across multiple projects, Define and implement DFT architecture, Collaborate with RTL, physical design, and verification teams, Manage ATPG and pattern generation, Oversee post-silicon bring-up and debug, Mentor and guide DFT engineers, Track project milestones and deliverables, Evaluate emerging DFT methodologies and tools
Seniority
Principal, strategy & mentorship