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Senior Design Engineer

Austin, Texas💼 Full-time💰 $161,500–$161,500🗓 2026-09-16 → 2026-10-07

Core

Designing complex compute subsystems and SoCs, integrating IP for PCIe, DDR, and other interfaces.

Role type

Senior IC digital design engineer (SoC)

Builds

SoCs with integrated I/O subsystems (PCIe, DDR, HBM, UCIe, Ethernet)

Required skills

Digital hardware design, Verilog HDL, SoC development, Subsystem integration (PCIe, DDR, HBM, UCIe, Ethernet), Static design checks (CDC, RDC, X-Propagation, Linting), Scripting (Perl, Python)

Preferred skills

ARM-based designs, SystemVerilog, UVM/OVM, Synthesis, Timing analysis, Power management, DFT

Technologies

Verilog, SystemVerilog, PCIe, DDR, LPDDR, HBM, UCIe, Ethernet, Perl, Python, UVM, OVM

Responsibilities

Write micro-architecture specifications and develop RTL, Integrate IP blocks for SoCs, Collaborate with verification and performance teams, Work with backend implementation for floor planning and timing closure, Guide and support team members, Balance project management activities

Seniority

Senior, hands-on IC