Lead Design Engineer
Core
Design and integration of Intellectual Property (IP) blocks within System-on-Chip (SoC) architectures based on customer specifications.
Role type
Lead Design Engineer (Digital SoC/IP)
Builds
Custom IP blocks and SoC architectures for semiconductor customers
Domain
Semiconductor / Digital SoC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (IP/SoC)
Required skills
Digital design fundamentals, Verilog, SystemVerilog, Lint/CDC flows, Synthesis constraints, Static Timing Analysis (STA), AMBA protocols, High-speed IP (PCIe, Ethernet, DDR), Python/Perl/Tcl scripting
Preferred skills
Synthesis tools, Simulation tools (Xcelium, Verisium), ARM IPs
Responsibilities
Design and integrate IPs in SoC based on high-level architectural specifications, Perform Lint/CDC checks and resolve issues, Create synthesis constraints and perform PPA optimization, Create detailed Microarchitectural Specification documents, Provide support to verification and physical design teams, Implement automation solutions for repetitive tasks
Seniority
Senior, hands-on IC
