Principal SoC Design Engineer
Core
Designing complex compute subsystems and System-on-Chips (SoCs) by integrating IP blocks, developing micro-architecture, and ensuring timing closure.
Role type
Principal SoC Design Engineer
Builds
SoCs integrating PCIe, DDR, HBM, UCIe, and Ethernet subsystems
Domain
Semiconductor / SoC Design
Required skills
Micro-architecture design, Logic design, Verilog HDL, SoC development techniques, PCIe/DDR/HBM/UCIe/Ethernet integration, Static design checks (CDC/RDC/X-Propagation/Linting), Scripting (Perl/Python)
Preferred skills
ARM-based designs, SystemVerilog, UVM/OVM, Team leadership, Synthesis, Timing analysis, Power management, DFT
Technologies
Verilog, SystemVerilog, UVM, OVM, PCIe, DDR, LPDDR, HBM, UCIe, Ethernet, Perl, Python
Responsibilities
Write micro-architecture specifications and develop RTL, Integrate IP blocks for I/O subsystems, Collaborate on architecture review and build specifications, Debug design issues and review test plans, Evaluate system performance with analysis teams, Assist with floor planning, constraints, and timing closure, Guide and support team members
Seniority
Principal, hands-on IC with mentorship
