ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
Core
Design and optimization of custom hardware (ASICs) for AWS Machine Learning inference servers, specifically the Inferentia chip.
Role type
Senior IC ASIC Design Engineer
Builds
Custom SoCs and ML inference server hardware
Domain
Cloud computing hardware / Machine Learning infrastructure
Deliverable
production ML models | product features
Required skills
RTL design, SystemVerilog, microarchitecture design, timing closure, power/area optimization, debugging, verification
Preferred skills
Formal verification, ARM/DSP ISAs, RF standards (4G/5G/WiMAX), Python/Perl scripting
Technologies
SystemVerilog, Python, Perl, ARM, DSP ISAs
Responsibilities
Develop high-performance RTL designs, analyze microarchitectures for trade-offs, create microarchitectures and deliver synthesis-ready designs, execute lint and CDC checks, collaborate with cross-functional teams
Seniority
Senior, hands-on IC
