Physical Design Engineer
Core
Design and analysis of 3D integrated products, combining traditional ASIC/SoC physical design with packaging, power, clock, and cooling analysis.
Role type
Senior IC physical design engineer (3D integration)
Builds
3D integrated products and novel 3D integration concepts
Domain
Semiconductor hardware / AI chip architecture
Deliverable
production ML models
Required skills
block physical design, full-chip physical verification, synthesis, power/performance/area optimization, complete physical design flow, DRC/LVS resolution, IR/EM analysis, scripting (Tcl/Python), RTL collaboration, 2.5D/3D packaging knowledge
Preferred skills
full-chip floor planning, clock distribution, cooling analysis, static timing analysis
Technologies
Synopsys tool suite, ICV, Calibre
Responsibilities
Perform block and full-chip physical verification; optimize power/performance/area; collaborate with architecture and RTL teams on R&D for 3D integration; resolve DRC and LVS issues; conduct IR/EM analysis
Seniority
Senior, hands-on IC
