Principal IC Package Design Engineer - TeraWave
Core
Foundational leader for the IC packaging team developing advanced packaging technologies for mmWave AiPs and complex SoCs to enable space-based communication.
Role type
Principal IC Package Design Engineer (TeraWave)
Builds
State-of-the-art packaging solutions for RF/mmWave, MS, and Digital ASICs
Domain
Aerospace / RF/mmWave IC Packaging
Deliverable
production ML models | product features
Required skills
Package development lifecycle management, Package-level EM/SI/thermal simulation, SiP/AiP/MCM implementation, 2.5D/3D EM simulators, Package design software, OSAT partnership, DFM rules, Package qualification
Preferred skills
PDK/ADK development, Beamformers & phased array implementation, Radiation-tolerant/hardened packages, Mentoring early career engineers
Technologies
HFSS, EMX, Momentum, Cadence Allegro APD, Cadence, Keysight
Responsibilities
Lead package engineering team to deliver packaging solutions, Define and manage simulation workflows for SI/EM/thermal, Collaborate on package co-optimization across antenna/PCB/die, Support validation & test board simulations, Partner with OSATs for mass production capabilities, Oversee package qualification process
Seniority
Principal, hands-on IC
