Silicon Packaging Process Engineer, Silicon Technology (Starlink)
Core
Developing in-house silicon packaging and assembly processes for Starlink satellites and consumer receivers, taking products from concept to mass production.
Role type
Silicon Packaging Process Engineer
Builds
Wafer-level and chip-level packaging systems for satellite constellations and broadband receivers
Domain
Aerospace / Semiconductor Manufacturing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor packaging process development, equipment selection, NPI/NTI execution, process baseline establishment, cross-functional technical interface, advanced packaging solutions implementation
Preferred skills
Advanced packaging, PCB/PCBA/SMT assembly, OSAT experience, advanced technical degree, 3+ years microelectronics packaging experience
Technologies
Wafer grinding, wafer dicing, lithography, lamination, plating, etching, SMT, flip chip, bonding, molding, underfill, dispense, sputter, lid attach, solder ball attach, panel-level packaging
Responsibilities
Own packaging assembly processes from concept to mass production, Develop new technologies and establish baselines for assembly and packaging, Bring-up for new product introduction (NPI) and new technology introduction (NTI), Select equipment and material to meet quality, reliability, cost, yield, and production targets, Interface with equipment and material suppliers for continuous improvement, Cross-functional interface with silicon design, materials, thermal, systems, and production teams
Seniority
Mid-level, hands-on IC
