Principal ASIC Package Design Engineer
Core
Lead advanced ASIC package architecture and execution for high-performance mixed-signal and digital SoCs, focusing on flip-chip BGA and multi-chip module solutions for high-power satellites.
Role type
Principal ASIC Package Design Engineer
Builds
High-power satellite platforms with complex, high-speed, power-dense ASICs
Domain
Aerospace / Semiconductor Packaging
Deliverable
production ML models | product features | infrastructure
Required skills
FC-BGA design, MCM solutions, substrate stack-up definition, power delivery network design, signal integrity analysis, thermal architecture, OSAT/vendor management, SI/PI simulation, high-pin-count ASIC integration
Preferred skills
MCM or heterogeneous integration, high-speed digital SoCs, aerospace/high-reliability electronics, packaging strategy definition, scaling package design methodology
Technologies
SIWave, HFSS, ADS
Responsibilities
Own ASIC package architecture for FC-BGA and MCM solutions; Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability; Define long-term packaging roadmap aligned with future ASIC nodes; Establish organizational package design standards and best practices; Drive detailed design of FC-BGA packages for high-pin-count ASICs; Define and review substrate stack-ups, via strategies, impedance control, and escape routing; Partner with silicon, RF, and systems teams to co-optimize die floorplans; Own package-level SI/PI strategy including high-speed digital interfaces and decoupling; Lead thermal architecture at the package level; Serve as primary technical interface to substrate vendors and OSATs; Drive material selection and assembly process optimization
Seniority
Principal, technical authority & strategy