Principal Product Engineer – High-Speed IP Memory
Core
Principal technical leader and product owner for high-speed interface IP (UCIe, PCIe, USB, DDR, HBM), driving post-sales support, pre-silicon integration, and post-silicon bring-up for customers.
Role type
Principal Product Engineer (High-Speed IP Memory)
Builds
Digital and mixed-signal IP solutions, specifically high-performance interface PHYs and memory subsystems
Domain
Semiconductor IP, High-Speed Interfaces, Memory Subsystems
Deliverable
product features
Required skills
high-speed interface IP, RTL design, gate-level verification, simulation methodologies, synthesis, static timing analysis (STA), timing closure, cross-functional technical leadership, customer-facing technical support, root cause analysis
Preferred skills
memory interfaces (DDR, LPDDR, GDDR, HBM), analog/mixed-signal design, silicon debug, AI-assisted workflows
Technologies
UCIe, PCIe, USB, DPHY, Ethernet, DDR, LPDDR, GDDR, HBM, RTL
Responsibilities
lead customer engagements and design reviews, resolve complex subsystem integration issues, lead SoC integration reviews, provide technical leadership for RTL and timing closure, lead post-silicon bring-up and debug, mentor junior engineers
Seniority
Principal, technical leadership & customer-facing
