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<Data center>Die-to-Die High Speed Analog Circuit and HBM/DDRPHY Design Engineer

HsinChu💼 Full-time🗓 2020-07-01 → 2026-07-22

Core

Design of high-speed analog PHY circuits for chip-to-chip interfaces (UCIe, Die-to-Die) and memory interfaces (HBM, DDR, LPDDR).

Role type

Analog PHY Circuit Design Engineer

Builds

High-speed analog circuit designs for memory and interconnect interfaces

Domain

Semiconductor, High-Speed Analog, Memory Interfaces

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Analog circuit design, High-speed circuit design, Mixed-mode circuit design, UCIe standard knowledge, HBM/DDR/LPDDR interface design

Preferred skills

Die-to-Die link design, Customized link design

Technologies

UCIe, HBM, DDR, LPDDR

Responsibilities

Design chip-to-chip interface analog PHY circuits, Design HBM/DDR/LPDDR analog PHY circuits

Seniority

Individual Contributor

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