Chip Lead / Physical Design Director
Core
Lead a team of Physical Design Architects to deliver RTL-to-GDS services for complex SoC projects in data centers, automotive, and AI markets.
Role type
Senior IC Physical Design Director / Chip Lead
Builds
Production SoC chips for data centers, automotive, and AI verticals
Domain
Semiconductor / EDA / Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Physical Design leadership, RTL-to-GDS flow management, PPA optimization, Static Timing Analysis, backend EDA flows (Place & Route, CTS, IR Drop), advanced node expertise (7nm+), scripting (Tcl/Perl/Python), customer technical engagement
Preferred skills
Front-end EDA (Synthesis, DFT, LEC), specific tool expertise (Genus, Innovus, Conformal, Tempus, Modus, Voltus), 3D IC design, domain expertise in CPUs/GPUs/AI Engines/NoCs
Technologies
Tcl, Perl, Python, Genus, Innovus, Conformal, Tempus, Modus, Voltus, ICC, ICC2, DC, Primetime
Responsibilities
Lead Physical Design and Design for Test teams for complex customer SoC projects, drive technical decisions and trade-offs to meet PPA targets, guide customers on foundry/node/library selection, collaborate with internal teams on tool enhancement and AI initiatives, ensure key metrics achievement prior to physical design execution, document best practices and lessons learned
Seniority
Senior, hands-on IC leader with team management