Lead Design Engineer
Core
Lead physical design implementation for ASICs at advanced technology nodes, focusing on low power and high speed designs.
Role type
Senior IC physical design engineer (ASIC)
Builds
ASIC chips for customers
Domain
Semiconductor / VLSI / Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
hierarchical physical design strategies, deep sub-micron technology issues, low power design, DFT, static timing analysis and closure, data skew balancing, duty cycle adjustment, EM/IR-Drop/crosstalk analysis, formal verification, physical verification, DFM, P&R
Preferred skills
next generation physical design methodology development, flow development
Technologies
Cadence tools, DRC, LVS, Antenna, EM/IR signoff
Responsibilities
Perform floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification, EM/IR signoff, DFM Closure
Seniority
Senior, hands-on IC