CareerPlanGet AI match score →

Sr. Engineer_ChuPei

ChuPei💼 Full-time🗓 2024-09-26 → 2026-07-22

Core

Physical design implementation for advanced process nodes (7nm to 3nm), covering floorplanning, timing closure, and sign-off.

Role type

Senior Physical Design Engineer

Builds

Integrated circuits and semiconductor chips

Domain

Semiconductor / VLSI Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

floorplanning, clock planning, place and route, timing closure, ECO, IR signoff, physical verification, schedule management, flow issue resolution

Responsibilities

Perform floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification; Manage schedule, resolve design and flow issues, drive methodologies and execution

Sourced via mediatek · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.
Apply on Mediatek ↗