Senior Engineer, Semiconductor Packaging
Core
Develop advanced packaging solutions for semiconductor devices, ensuring performance, reliability, and manufacturability across wire-bond, flip-chip, SiP, and module-based products.
Role type
Senior IC packaging engineer
Builds
Semiconductor packaging solutions and modules
Domain
Semiconductor manufacturing / Hardware engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor packaging design, electrical simulation (EMPro, ADS, Sigrity, HFSS), IC package structures, substrate technologies, assembly processes, RLC extraction, signal integrity, power integrity, electromagnetic simulation, circuit simulation
Preferred skills
Cadence Allegro
Responsibilities
Drive design, development, and qualification of packaging solutions; perform electrical simulations of IC packages/modules; collaborate with OSAT partners and substrate suppliers to optimize manufacturing and improve yield; establish reliability criteria with quality teams; develop package design guidelines and technical documentation
Seniority
Senior, hands-on IC
