Digital Verification Engineer
Core
End-to-end verification ownership of complex digital and mixed-signal designs for Optical Control ICs targeting AI datacenter and cloud infrastructure.
Role type
Senior IC digital verification engineer
Builds
Optical Control ICs for AI datacenter and cloud infrastructure
Domain
Semiconductor / AI infrastructure
Deliverable
production ML models
Required skills
SystemVerilog, UVM, functional coverage, code coverage, AMBA protocols (AXI, AHB, APB), C/C++, Python, Tcl, shell scripting, mixed-signal verification, analog modeling, co-simulation, post-silicon validation
Preferred skills
AI-assisted design tools, mixed-signal verification, analog modeling, co-simulation, post-silicon validation
Technologies
SystemVerilog, UVM, Python, Tcl, shell scripting, C, C++, AXI, AHB, APB
Responsibilities
Own block-level, chip-level, and system-level verification; Develop comprehensive verification plans including test strategy, functional coverage, assertions, and closure criteria; Build and maintain UVM-based verification environments; Drive functional and code coverage analysis; Perform in-depth debug and root-cause analysis; Collaborate with digital, analog/mixed-signal, and firmware teams; Support post-silicon validation and bring-up
Seniority
Senior, hands-on IC
