Senior Staff Engineer, Physical Design (Floorplanning)
Core
Senior Staff GPU Physical Design Engineer focusing on top-level floorplanning, power-grid implementation, and methodology innovation for high-performance GPU and SoC designs.
Role type
Senior Staff IC physical design engineer (floorplanning & power-grid)
Builds
High-performance GPU and system-level IP for mobile, automotive, and custom markets
Domain
Semiconductor / Advanced Node Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> physical/clinical work (semiconductor manufacturing context)
Required skills
top-level floorplanning, power-grid design, PNR toolflows, timing closure, STA, scripting (Python/Tcl/Shell/Perl), physical verification (DRC/LVS), low-power design, congestion management, reliability analysis
Preferred skills
advanced-node designs (≤5nm), DTCO methodologies, package and power-only layer experience, layout-integration, automation/flow-level methodology
Technologies
FusionCompiler, Innovus, RedHawk, ICC2, PrimeTime, Tempus, StarRC, Python, Tcl, Shell, Perl
Responsibilities
Shape full-chip and block-level implementation including floorplanning, placement, routing, and signoff; Contribute to implementation strategies for PPA targets; Advance methodology and flow innovation including automation; Collaborate cross-functionally to resolve complex implementation challenges; Mentor junior engineers and foster a culture of innovation
Seniority
Senior Staff, hands-on IC with mentorship
