Design Technology Co-Optimization (DTCO) Engineer, Design flow and Methodology
Core
Building highly efficient design and analysis flows and methodologies for Design Technology Co-Optimization (DTCO) to support next-generation SoC products.
Role type
Senior IC DTCO Engineer (Design Flow & Methodology)
Builds
Automated CAD flows for custom design, design space exploration, and analysis methodologies for high-performance computing devices.
Domain
Semiconductor manufacturing, advanced nodes (beyond 5nm), EDA tools, SoC design.
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Logic/physical synthesis, automated place and route, power estimation, standard cell design, PPA analysis, device physics, scripting (Tcl, Perl, Python), data analysis, batch run environments.
Preferred skills
Machine learning practices for productivity improvement, foundry collaboration experience.
Technologies
Cadence Innovus, Synopsys Fusion Compiler, EM/IR analysis, Static Timing Analysis (STA), Physical Verification (PV).
Responsibilities
Develop CAD flows for custom design with high automation; drive collaboration with IP teams to ensure design rule and methodology changes are consumable; solve CAD and design methodology challenges; create analysis metrics to remove bottlenecks; maintain thorough documentation and publish results.
Seniority
Senior, hands-on IC
