Senior Analog Layout Engineer
Core
Lead block and macro-level layout development for high-performance analog circuits using BiCMOS technologies to support next-generation broadband fiber-optic modem solutions.
Role type
Senior IC analog layout engineer
Builds
High-speed analog circuits for optical fiber transmission solutions
Domain
Telecommunications / High-speed connectivity / BiCMOS
Required skills
Analog layout (floor planning, creation, optimization), BiCMOS and CMOS technologies, Physical verification, Electromigration checks, Analog design tools (Cadence Virtuoso, Calibre PERC, PEX), Circuit topology evaluation, Mentor/Synopsys tools
Preferred skills
Deep-submicron CMOS, Automation scripts and Pcells, Digital synthesis and place and route
Technologies
Virtuoso, Calibre PERC, PEX, Cadence, Mentor, Synopsys
Responsibilities
Lead block and macro-level layout development including floor planning and optimization; Evaluate layout feasibility across multiple circuit topologies; Execute physical verification and electromigration checks; Mentor junior layout engineers
Seniority
Senior, hands-on IC
