THW Client Co-op (January 2027 - Rochester, NY)
Core
Design and verify digital blocks, cores, and subsystems for ASIC products and FPGA-based validation within the WaveLogic coherent engine chipsets.
Role type
Junior IC ASIC design and verification engineer
Builds
Digital ASIC products and FPGA-based validation environments for optical networking
Domain
Optical networking / Semiconductor hardware
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Digital ASIC design, FPGA development, SystemVerilog, Verilog, VHDL, UVM verification, Python scripting, IEEE 802.3/ITU/OIF standards knowledge
Preferred skills
OTN knowledge, Ethernet standards, Linux environment experience, debugging skills
Technologies
SystemVerilog, Verilog, VHDL, UVM, Python, FPGA, ASIC
Responsibilities
Design and verify digital blocks, cores, and subsystems; Collaborate with design and verification engineers; Implement digital designs; Develop and enhance prototype and development automation solutions; Apply communications standards knowledge; Contribute to digital ASIC development projects
Seniority
Student co-op, hands-on IC
