Senior Analog Layout Engineer
Core
Design and implement high-speed analog layouts for optical fiber transmission solutions, including DAC/ADC SERDES and modulator driver circuits.
Role type
Senior IC analog layout engineer (CMOS/BiCMOS)
Builds
High-speed analog macros (DAC, ADC, PLL, SERDES) for coherent fiber-optic product solutions
Domain
Telecommunications / High-speed analog IC design
Required skills
Custom analog and mixed-signal layout design, Deep sub-micron CMOS/BiCMOS knowledge, Floor planning, Placement and routing, DRC/ANT/LVS/PERC/EM/IR verification, Parasitic minimization, RF shielding, Foundry process familiarity, Scripting (PERL/SKILL)
Preferred skills
None explicitly stated as preferred
Technologies
Cadence Virtuoso, Siemens Calibre, Ansys Totem
Responsibilities
Conduct layout feasibility studies, Create layouts via floor planning/placement/routing, Perform verification checks (DRC, ANT, LVS, PERC, EM, IR), Investigate new layout tool features, Provide status updates and collaborate with team
Seniority
Mid-level (1-5 years experience), hands-on IC