DFT Staff Engineer
Core
Design for Test (DFT) engineer responsible for SoC DFT activities including architecture, test insertion, verification, pattern generation, coverage improvement, and post-silicon debug to meet product test metrics.
Role type
Staff IC DFT Engineer
Builds
ASIC designs for Broadcom APD
Domain
Semiconductor / ASIC Design
Required skills
DFT concepts, ATPG, MBIST, IJTAG, DFT insertion & verification, pattern generation, coverage improvement, vector simulation, post-silicon debug, scripting (Perl, Shell), Physical Design & STA collaboration
Preferred skills
Mentor Graphics DFT tools (Tessent Shell), cross-geography team collaboration
Responsibilities
Work on DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement, collaborate with Physical Design & STA team for DFT mode timing closure, interact with external customers
Seniority
Staff, hands-on IC
