DFT Senior Engineer
Core
Design for Test (DFT) engineering for Broadcom APD ASIC designs, covering architecture, test insertion, verification, pattern generation, coverage improvement, and post-silicon debug.
Role type
Senior IC DFT Engineer
Builds
ASIC chips with robust testability and yield
Domain
Semiconductor / ASIC Design
Required skills
DFT architecture, ATPG, MBIST, IJTAG, DFT insertion & verification, pattern generation, coverage improvement, vector simulation, post-silicon debug, Perl scripting, Shell scripting, timing closure collaboration
Preferred skills
Mentor Graphics Tessent Shell expertise
Responsibilities
Work on DFT architecture, test insertion and verification, pattern generation, coverage improvement, post silicon debug and yield improvement, collaborate with Physical Design & STA teams, interact with external customers
Seniority
Senior, hands-on IC
