ASIC Package Design Engineer
Core
Designing complex flip-chip-BGA packages for high-performance ASICs supporting AI, networking, HPC, and 5G, focusing on signal integrity, power integrity, thermal, and manufacturability.
Role type
Senior IC package-design engineer
Builds
High-performance package structures for SerDes, ADC/DAC, DDR, HBM, and other critical components
Domain
Semiconductor / High-speed digital & RF / AI & HPC
Required skills
Flip-chip BGA package design, Signal integrity analysis, Power integrity analysis, Thermal management, Physical design (layout), Project management, Vendor collaboration, Design automation scripting
Preferred skills
Cadence APD (Allegro), Cadence SKILL, Design automation coding
Technologies
Cadence Allegro, Cadence APD, Cadence SKILL
Responsibilities
Overall design responsibility for ASIC package designs including signal/power integrity and thermal aspects, Package design of critical structures for SerDes/ADC/DAC/DDR/HBM, Schedule and track work across multiple projects, General flip-chip BGA package design and engineering, Project management and customer interface, Contribute to efficiency improvements through process development and automation, Physical design (layout)
Seniority
Senior, hands-on IC
