Staff Layout Engineer

Broadcom

Singapore-YishunFull-time2026-10-12 → 2026-11-10

Based in Singapore

Core

Designing and verifying IC layouts for memory, I/O, and standard cells in advanced submicron processes.

Role type

Staff IC Layout Engineer

Builds

Memory, I/O, and standard cell libraries for semiconductor chips

Domain

Semiconductor / IC Design

Required skills

IC layout design, Cadence Virtuoso, CALIBRE verification, DRC/LVS/ERC/Antenna/Electro Migration checks, floor-planning, hierarchy layout, chip integration, memory topology, process rules (16nm/7nm/5nm/2nm)

Preferred skills

Analog layout, memory compiler, SKILL/Script programming, team leadership, new technology reviews

Technologies

Cadence Virtuoso, CALIBRE, Hercules

Responsibilities

Apply layout guidelines and process rules, schedule timelines and floor-plan, complete quality layout and verification, lead or train junior engineers, compile layout methodology documentation

Seniority

Staff, hands-on IC with leadership

About Broadcom

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.