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Substrate/Package Layout Engineer

USA-California-San Jose-1320 Ridder Park Drive💼 Full-time💰 $141,300–$141,300🗓 2026-04-20 → 2026-07-30

Core

Design and layout advanced substrates and IC packages, including high-speed lines and interposers, ensuring functionality and performance.

Role type

IC Substrate and Package/Interposer Layout Engineer

Builds

High-speed RF substrates, IC packages, and interposers for semiconductor products

Domain

Semiconductor manufacturing, RF design, and electronic packaging

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Cadence layout tools (Allegro, Innovus, Virtuoso), Electronic Design Automation (EDA), multilayer high-speed RF design, package/substrate manufacturing processes, surface mount technology, script-based layout tools, DRC, LVS

Preferred skills

Simulation of designs, improvement of layout methodologies and flows

Technologies

Calibre, Klayout, Cadence Allegro, Cadence Innovus, Cadence Virtuoso

Responsibilities

Design and layout advanced substrates and IC packages; Develop and utilize script-based layout tools; Collaborate with design and verification teams to ensure layout meets specifications; Perform design rule checking (DRC) and layout vs schematic (LVS) check; Contribute to the development and improvement of layout methodologies and flows

Seniority

Senior, hands-on IC

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