Sr. RFIC Layout Designer (Starshield Silicon)
Core
Designing custom analog and RFIC chips for national security satellite systems, focusing on floor planning, layout integration, and tape-out for space and ground infrastructure.
Role type
Senior IC Layout Engineer (RFIC/Mixed Signal)
Builds
Custom RF and analog integrated circuits for Starshield satellite payloads
Domain
Aerospace / National Security / RFIC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IC layout design, floor planning, power/ground distribution, DRC/LVS, EDA tool usage, GDS tape-out, shell scripting, Linux
Preferred skills
Advanced node layout (16nm/7nm/5nm), high-frequency RF layout (up to 50GHz), sensitive RF block design (LNA, VCO, mixers), skill programming, circuit design understanding, device matching/noise isolation
Technologies
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Python, Perl, Linux
Responsibilities
Determine chip floor plan and pad locations, estimate layout schedules, perform layout of custom RF/analog blocks, execute DRC/LVS and resolve errors, integrate top-level layout with ESD structures and perform tape-out, trial new EDA tools, generate layout technique guides
Seniority
Senior, hands-on IC