DFT Engineer
Core
Implement and verify DFT solutions (Scan, MBIST, Boundary Scan) for complex SoC designs to ensure testability and design quality.
Role type
DFT Engineer
Builds
Production silicon with verified testability and high fault coverage
Domain
Semiconductor / VLSI / SoC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Scan insertion, MBIST, Boundary Scan, ATPG pattern development, DFT automation scripting, SoC DFT design, fault coverage analysis
Preferred skills
Large-scale chip DFT implementation, ASIC/SoC development flow familiarity
Technologies
Verilog, VHDL, Tcl, Perl, Python, Shell
Responsibilities
Implement and verify Scan, MBIST, and Boundary Scan solutions; Perform scan insertion, DFT DRC checking, and scan chain validation; Analyze fault coverage and develop ATPG patterns; Develop and maintain DFT automation flows and scripts; Collaborate with SoC Design, Verification, Physical Design, and Test Engineering teams; Support silicon bring-up, diagnosis, and yield improvement activities
Seniority
Junior to Mid-level, hands-on IC
