Lead Standard cell design/characterization Engineer
Core
Design, characterization, and layout development of standard cell libraries and macros for NXP's logic library team, supporting design teams with reliability and timing closure consultancy.
Role type
Lead Standard Cell Design/Characterization Engineer
Builds
Standard cell libraries (flip flops, latches, power switch cells, etc.) and EDA views/models for NXP logic products
Domain
Semiconductor IC Design, Standard Cell Library Development, EDA
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Standard cell circuit design, Characterization, Layout design, CMOS and FinFET technology understanding, EDA tool expertise (Siemens, Cadence, Synopsys), Circuit and MC simulations, Layout Dependent Effects analysis, RTL2GDS flow knowledge (STA, PnR)
Preferred skills
AIML/Agentic AI literacy, NLDM/CCSP/CCSN/AOCV/LVF model characterization, Scripting (SKILL, Python, TCL, PERL), Data visualization (PowerBI, Tableau)
Technologies
Siemens, Cadence, Synopsys, SKILL, Python, TCL, PERL
Responsibilities
Design and characterize standard cells and macros across planar and non-planar nodes, Develop EDA views and models for library characterization, Contribute to circuit design improvement and innovative library solutions, Provide consultancy to design teams on reliability and timing closure
Seniority
Senior, hands-on IC
