Custom Layout Engineer (Senior)
Core
Physical design implementation of Foundation IP, Analog IP, and RFIC for next-generation process platforms and SoC developments.
Role type
Senior Custom Layout Engineer
Builds
Customizable IPs in advanced process technologies for MediaTek's premium ASIC services
Domain
Semiconductor physical design (Digital, Analog, RFIC)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Layout automation, APR (Analog Place and Route), workflow scripting, floorplanning, physical verification, QA flow sign-off, multi-node process expertise, foundry collaboration
Preferred skills
Deep technical skills in layout implementation, proven track record in mid-level positions
Technologies
Layout automation tools, APR tools, verification flows
Responsibilities
Execute layout design implementation for digital, analog, and RFIC projects; develop and enhance layout automation flows; act as DRI for complete layout implementation including floorplanning and verification; collaborate with multi-functional teams to optimize Power, Performance, and Area (PPA); provide project status updates and mitigate execution risks
Seniority
Senior, hands-on IC
