Memory circuit verification Engineer
Core
Lead verification and end-to-end analysis of sophisticated full-chip gate-level custom designs for advanced low-power memory technologies (DDR5, LPDDR5, DDR6, LPDDR6) operating at high speeds up to 9600MT/s.
Role type
Senior IC verification engineer (memory circuit)
Builds
Pre-silicon full chip designs for DRAM and emerging memory architectures
Domain
Semiconductor / Memory / Digital Logic
Required skills
Gate-level simulation with delays, Logic schematic analysis, Complex CMOS/gate-level circuit design analysis, Spice simulation, Verilog simulation, Python scripting, Timing analysis (Setup/Hold, critical data path), AI-assisted verification tools
Preferred skills
Experience with DDR5/LPDDR5/DDR6/LPDDR6 architectures, AI-based automation for verification productivity
Technologies
Spice, Verilog, Python, AI-assisted verification tools
Responsibilities
Guide verification effort direction for projects, Simulate and debug pre-silicon full chip designs, Develop test cases/stimulus for functional coverage, Participate in developing verification methodology and environments, Co-work on developing new verification flows, Develop and maintain test benches/vectors and run regressions, Identify verification struggles suitable for AI-based automation
Seniority
Senior, hands-on IC
