DRAM Verification Engineer
Core
Lead verification efforts for DRAM and emerging memory architectures by developing test cases, simulation environments, and methodologies to ensure functional coverage and design quality.
Role type
Senior IC DRAM verification engineer (System Verilog/UVM)
Builds
Pre-silicon full chip designs and verification environments for advanced DRAM and emerging memory products
Domain
Semiconductor memory (DRAM/NAND/NOR) and hardware verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog, UVM, DRAM operation knowledge, Schematic analysis, Simulation tools (fastspice/Primesim/Finesim/Xcelium/VCS), Test bench development, Regression analysis, AI integration for verification efficiency
Preferred skills
RTL design and Synthesis, Static Timing Analysis, Timing-driven place & route layout
Technologies
fastspice, Primesim, Finesim, Xcelium, VCS, Claude Code
Responsibilities
Guide verification effort direction, simulate and debug pre-silicon designs, develop test cases and stimulus, co-work on new verification flows, maintain test benches and run regressions, enhance verification efficiency using AI
Seniority
Senior, hands-on IC
