Principal Compute Pathfinding ASIC Design
Core
Define and evolve advanced ASIC architectures and system-level designs for future memory and compute capabilities, bridging high-level modeling with RTL and physical design implementation.
Role type
Principal ASIC Architect (Compute Pathfinding)
Builds
Advanced ASIC solutions and compute architectures for Micron's long-term technology roadmap
Domain
Semiconductor / ASIC Design / Computer Architecture
Deliverable
production ML models | product features
Required skills
ASIC architecture definition, Verilog/SystemVerilog, logic design, synthesis, system-level modeling, backend physical design flows, performance/power/area tradeoffs
Preferred skills
High-level synthesis (HLS), static timing analysis, power optimization, architectural exploration frameworks
Technologies
Verilog, SystemVerilog, ASIC design tools, synthesis tools, static timing analysis tools
Responsibilities
Define ASIC architectures including logic partitioning and module interfaces; Write block-level and architectural specifications; Oversee logic design and synthesis activities; Evaluate impacts of placement, routing, timing, and power on architectural decisions; Perform system-level modeling and validate proof-of-concept designs; Drive evaluation of complete ASIC flows from high-level design through timing closure; Collaborate with multi-functional teams for implementation readiness
Seniority
Principal, hands-on IC with strategy & roadmap influence
