Staff Design Engineer
Core
Designing advanced subsystems and System-on-Chip (SoC) architectures, including micro-architecture specifications for clocking, reset, debug, power management, interconnect, and interrupts.
Role type
Staff Design Engineer (SoC/Subsystem Architecture)
Builds
Complex compute subsystems and SoCs for infrastructure areas
Domain
Semiconductor / SoC Design
Required skills
Micro-architecture specification, RTL design, Verilog HDL, SoC design techniques, Lint/CDC/RDC/UPF/CLP flows, Scripting (Perl/Python)
Preferred skills
ARM-based designs, Interconnect/DDR/HBM/UCIe, System Verilog/UVM/OVM, Synthesis/timing analysis, Power optimization, DFT
Technologies
Verilog, System Verilog, UVM, OVM, Perl, Python, Lint, CDC, RDC, UPF, CLP
Responsibilities
Write micro-architecture specifications, develop RTL, fix bugs, run design checks, review test plans with verification team, evaluate PPA with power/performance team, enhance design methodologies, guide and support team members, collaborate with project management on plans and schedules
Seniority
Staff, hands-on IC with mentorship