Package Silicon Technology Node Development Director/DMTS
Core
Define and drive chip-package interaction (CPI) technology strategy and roadmaps to enable advanced silicon node transitions in next-generation memory products.
Role type
Director / Distinguished Member of Technical Staff (DMTS) in Package Development Engineering
Builds
Next-generation memory products (DRAM, NAND, NOR) enabling AI, 5G, data center, and mobile applications
Domain
Semiconductor manufacturing, memory technology, chip-package integration
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Chip-package interaction (CPI) strategy, semiconductor process technology development, failure analysis, reliability testing and qualification, risk management frameworks, cross-functional program leadership, technical roadmap planning
Preferred skills
Memory technologies expertise, semiconductor device physics, public technical publications or patents
Technologies
DRAM, NAND, NOR memory technologies, advanced silicon nodes
Responsibilities
Define long-term CPI technology roadmaps aligned with silicon node transitions, lead global technical initiatives for silicon/package/test vehicle alignment, establish and drive CPI risk identification and mitigation strategies, mentor engineering teams to foster technical excellence, represent the organization in strategic discussions with internal and external stakeholders
Seniority
Director level, strategic leadership with hands-on technical expertise